Abstract
A CAD tool set for VLSI CMOS I/O circuit design is developed. It includes a circuit simulator, a layout extractor and a substrate resistance solver. This paper presents a new layout extractor for CMOS I/O circuits and a new method for modelling the substrate resistance. With these tools, for the first time, full I/O circuits can be simulated accurately at the circuit-level with the substrate-coupling effects taken into consideration. The CAD tools are demonstratively applied to an industrial circuit.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 389-392 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 6 |
| State | Published - 1998 |
| Event | Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA Duration: May 31 1998 → Jun 3 1998 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering