Modeling and Simulation of the SDC Data Collection Chip1

E. Hughes, G. Tharakan, R. Downing, M. Haney, E. Golin, L. Jones, D. Knapp, J. Thaler

Research output: Contribution to journalArticle

Abstract

This paper describes modeling and simulation of the Data Collection Chip (DCC) design for the Solenoidal Detector Collaboration (SDC). Models of the DCC written in Verilog and VHDL are described, and results are presented. The models have been simulated to study queue depth requirements and to compare control feedback alternatives. Insight into the management of models and simulation tools is given. Finally, techniques useful in the design process for data acquisition systems are discussed.

Original languageEnglish (US)
Pages (from-to)130-137
Number of pages8
JournalIEEE Transactions on Nuclear Science
Volume39
Issue number2
DOIs
StatePublished - Apr 1992

ASJC Scopus subject areas

  • Nuclear and High Energy Physics
  • Nuclear Energy and Engineering
  • Electrical and Electronic Engineering

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    Hughes, E., Tharakan, G., Downing, R., Haney, M., Golin, E., Jones, L., Knapp, D., & Thaler, J. (1992). Modeling and Simulation of the SDC Data Collection Chip1. IEEE Transactions on Nuclear Science, 39(2), 130-137. https://doi.org/10.1109/23.277472