Modeling and simulation of the SDC data collection chip

E. Hughes, G. Tharakan, R. Downing, M. Haney, E. Golin, L. Jones, D. Knapp, Jon J Thaler

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper describes modeling and simulation of the Data Collection Chip (DCC) design for the Solenoidal Detector Collaboration (SDC). Models of the DCC written in Verilog and VHDL are described, and results are presented. The models have been simulated to study queue depth requirements and to compare control feedback alternatives. Insight into the management of models and simulation tools is given. Finally, techniques useful in the design process for data acquisition systems are discussed.

Original languageEnglish (US)
Title of host publicationIEEE Seventh Conf Real Time 91 Computer Appl Nucl Part Plasma Phys
PublisherPubl by IEEE
Pages141-148
Number of pages8
ISBN (Print)0780304586
StatePublished - Dec 1 1992
EventIEEE Seventh Conference Real Time '91 on Computer Applications in Nuclear, Particle and Plasma Physics - Juelich, Ger
Duration: Jun 24 1991Jun 28 1991

Publication series

NameIEEE Seventh Conf Real Time 91 Computer Appl Nucl Part Plasma Phys

Other

OtherIEEE Seventh Conference Real Time '91 on Computer Applications in Nuclear, Particle and Plasma Physics
CityJuelich, Ger
Period6/24/916/28/91

ASJC Scopus subject areas

  • Engineering(all)

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