Mitigating execution unit contention in parallel applications using instruction-aware mapping

Matheus S. Serpa, Eduardo H.M. Cruz, Matthias Diener, Arthur F. Lorenzon, Antonio C.S. Beck, Philippe O.A. Navaux

Research output: Contribution to journalArticlepeer-review


Parallel applications running on simultaneous multithreading (SMT) processors naturally compete for execution units when their threads are mapped to the same core. This issue is further aggravated when such threads execute similar instructions that stress the same execution unit type, making their execution to behave very similarly as if the threads were running sequentially. This, in turn, will lead to performance degradation and underutilization of hardware resources. This work proposes a completely transparent framework (no modifications to the source code are necessary) that automatically maps threads of multiple parallel applications on SMT processors. The framework focuses on improving performance by mitigating the contention on execution units, considering each thread's instruction types, which are detected at runtime by our framework. Results show performance gains of 21% (geometric mean), compared to the native scheduler of the operating system.

Original languageEnglish (US)
Article numbere6819
JournalConcurrency and Computation: Practice and Experience
Issue number17
StatePublished - Aug 1 2023


  • execution unit contention
  • SMT processors
  • resource sharing
  • performance degradation

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Software
  • Computer Science Applications
  • Computer Networks and Communications
  • Computational Theory and Mathematics


Dive into the research topics of 'Mitigating execution unit contention in parallel applications using instruction-aware mapping'. Together they form a unique fingerprint.

Cite this