TY - GEN
T1 - Merged two-stage power converter with soft charging switched-capacitor stage in 180 nm CMOS
AU - Pilawa-Podgurski, Robert C.N.
AU - Perreault, David J.
PY - 2011
Y1 - 2011
N2 - In this paper, we introduce a merged two-stage dc-dc power converter for low-voltage power delivery. By separating the transformation and regulation function of a dc-dc power converter into two stages, both large voltage transformation and high control bandwidth can be achieved. We show how the switched-capacitor stage can operate under soft charging conditions by suitable control and integration (merging) of the two stages. This mode of operation enables improved efficiency and/or power density in the switched-capacitor stage. A 5-to-1 V, 0.8 W integrated dc-dc converter has been developed in 180 nm CMOS. The converter achieves a peak efficiency of 81%, with a regulation stage switching frequency of 10 MHz.
AB - In this paper, we introduce a merged two-stage dc-dc power converter for low-voltage power delivery. By separating the transformation and regulation function of a dc-dc power converter into two stages, both large voltage transformation and high control bandwidth can be achieved. We show how the switched-capacitor stage can operate under soft charging conditions by suitable control and integration (merging) of the two stages. This mode of operation enables improved efficiency and/or power density in the switched-capacitor stage. A 5-to-1 V, 0.8 W integrated dc-dc converter has been developed in 180 nm CMOS. The converter achieves a peak efficiency of 81%, with a regulation stage switching frequency of 10 MHz.
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U2 - 10.1109/ESSCIRC.2011.6045011
DO - 10.1109/ESSCIRC.2011.6045011
M3 - Conference contribution
AN - SCOPUS:82955164346
SN - 9781457707018
T3 - European Solid-State Circuits Conference
SP - 479
EP - 482
BT - ESSCIRC 2011 - Proceedings of the 37th European Solid-State Circuits Conference
T2 - 37th European Solid-State Circuits Conference, ESSCIRC 2011
Y2 - 12 September 2011 through 16 September 2011
ER -