Memory-aware scheduling of multicore task sets for real-time systems

Stanley Bak, Gang Yao, Rodolfo Pellizzoni, Marco Caccamo

Research output: Contribution to conferencePaper

Abstract

Real-time scheduling of memory-intensive applications is a particularly difficult challenge. On a multi-core system, not only is the CPU scheduling an issue, but equally important is the management of mutual interference among tasks caused by simultaneous access to the shared main memory. To confront this problem, we explore real-time schedulers for task sets which adhere to the Predictable Execution Model (PREM). In each PREM-compliant task, execution is divided into phases which retrieve data from main memory, and phases which perform local computation using previously-cached data. In this work, we perform a simulation-based analysis with the goal of determining which schedulers are generally better at scheduling PREM-compliant task sets. We investigate several memory intensive real-time benchmarks from the EEMBC benchmark suite, in order to drive our task set generation parameters. We elaborate on a PREM-complaint task set simulator which we designed specifically to be able to simulate PREM-compliant tasks. The overall best scheduling policy we found, which we call M-LAX, schedules access to memory in a no preemptive fashion according to a least-laxity-first policy. M-LAX outperforms an EDF-based approach, a previously-analyzed TDMA arbitration scheme, and the unscheduled case where tasks interfere when accessing memory.

Original languageEnglish (US)
Pages300-309
Number of pages10
DOIs
StatePublished - Nov 19 2012
Event18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2012 - Seoul, Korea, Republic of
Duration: Aug 19 2012Aug 22 2012

Other

Other18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2012
CountryKorea, Republic of
CitySeoul
Period8/19/128/22/12

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Keywords

  • M-LAX
  • PREM
  • benchmark
  • eembc
  • least-laxity first
  • multicore
  • predictable execution model
  • real-time scheduling
  • scheduling
  • simulation
  • simulator
  • tdma

ASJC Scopus subject areas

  • Artificial Intelligence
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition

Cite this

Bak, S., Yao, G., Pellizzoni, R., & Caccamo, M. (2012). Memory-aware scheduling of multicore task sets for real-time systems. 300-309. Paper presented at 18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2012, Seoul, Korea, Republic of. https://doi.org/10.1109/RTCSA.2012.48