Memory access control in multiprocessor for real-time systems with mixed criticality

Heechul Yun, Gang Yao, Rodolfo Pellizzoni, Marco Caccamo, Lui Sha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Shared resource access interference, particularly memory and system bus, is a big challenge in designing predictable real-time systems because its worst case behavior can significantly differ. In this paper, we propose a software based memory throttling mechanism to explicitly control the memory interference. We developed analytic solutions to compute proper throttling parameters that satisfy schedulability of critical tasks while minimize performance impact caused by throttling. We implemented the mechanism in Linux kernel and evaluated isolation guarantee and overall performance impact using a set of synthetic and real applications.

Original languageEnglish (US)
Title of host publicationProceedings of the 24th Euromicro Conference on Real-Time Systems, ECRTS 2012
Pages299-308
Number of pages10
DOIs
StatePublished - 2012
Event24th Euromicro Conference on Real-Time Systems, ECRTS 2012 - Pisa, Italy
Duration: Jul 10 2012Jul 13 2012

Publication series

NameProceedings - Euromicro Conference on Real-Time Systems
ISSN (Print)1068-3070

Other

Other24th Euromicro Conference on Real-Time Systems, ECRTS 2012
Country/TerritoryItaly
CityPisa
Period7/10/127/13/12

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture

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