Maze Routing with Buffer Insertion and Wiresizing

Minghorng Lai, D. F. Wong

Research output: Contribution to journalConference articlepeer-review

Abstract

We propose an elegant formulation of the Maze Routing with Buffer Insertion and Wiresizing problem as a graph-theoretic shortest path problem. This formulation provides time and space performance improvements over previously proposed dynamic-programming based techniques. Routing constraints such as wiring obstacles and restrictions on buffer locations and types are easily incorporated in the formulation. Furthermore, efficient software routines solving shortest path problems in existing graph application libraries can be applied. We construct a BP-Graph such that the length of every path in this graph is equal to the Elmore delay. Therefore, finding the minimum Elmore delay path becomes a finite shortest path problem. The buffer choices and insertion locations are represented as the vertices in the BP-Graph. The interconnect wires are sized by constructing a look-up table for buffer-to-buffer wiresizing solutions. We also provide a technique that is able to tremendously improve the runtime. Experiments show improvements over previously proposed methods.

Original languageEnglish (US)
Pages (from-to)374-378
Number of pages5
JournalProceedings - Design Automation Conference
StatePublished - Jan 1 2000
Externally publishedYes
EventDAC 2000: 37th Design Automation Conference - Los Angeles, CA, USA
Duration: Jun 5 2000Jun 9 2000

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

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