Manifestation of faults to errors in signature analysis

John C. Chan, Baxter F. Womack, D. F. Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The study of the relation between faults and its syndromes in signature analysis of computer hardware testing is presented. When an incorrect signature is observed, it is caused by one of many possible error sequences that contains errors at different locations. The characteristics of the error distributions are identified for greater fault coverage. Formal analysis is presented in conjunction with the subject of error-control code. The results provide insights to use deterministic test patterns in signature analysis.

Original languageEnglish (US)
Title of host publicationIEEE International Conference on Computer Design - VLSI in Computers and Processors
PublisherPubl by IEEE
Pages360-363
Number of pages4
ISBN (Print)0818622709
StatePublished - Dec 1 1991
Externally publishedYes
EventProceedings of the 1991 IEEE International Conference on Computer Design - VLSI in Computers and Processors - ICCD '91 - Cambridge, MA, USA
Duration: Oct 14 1991Oct 16 1991

Publication series

NameIEEE International Conference on Computer Design - VLSI in Computers and Processors

Other

OtherProceedings of the 1991 IEEE International Conference on Computer Design - VLSI in Computers and Processors - ICCD '91
CityCambridge, MA, USA
Period10/14/9110/16/91

Fingerprint

Computer hardware
Testing

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Chan, J. C., Womack, B. F., & Wong, D. F. (1991). Manifestation of faults to errors in signature analysis. In IEEE International Conference on Computer Design - VLSI in Computers and Processors (pp. 360-363). (IEEE International Conference on Computer Design - VLSI in Computers and Processors). Publ by IEEE.

Manifestation of faults to errors in signature analysis. / Chan, John C.; Womack, Baxter F.; Wong, D. F.

IEEE International Conference on Computer Design - VLSI in Computers and Processors. Publ by IEEE, 1991. p. 360-363 (IEEE International Conference on Computer Design - VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chan, JC, Womack, BF & Wong, DF 1991, Manifestation of faults to errors in signature analysis. in IEEE International Conference on Computer Design - VLSI in Computers and Processors. IEEE International Conference on Computer Design - VLSI in Computers and Processors, Publ by IEEE, pp. 360-363, Proceedings of the 1991 IEEE International Conference on Computer Design - VLSI in Computers and Processors - ICCD '91, Cambridge, MA, USA, 10/14/91.
Chan JC, Womack BF, Wong DF. Manifestation of faults to errors in signature analysis. In IEEE International Conference on Computer Design - VLSI in Computers and Processors. Publ by IEEE. 1991. p. 360-363. (IEEE International Conference on Computer Design - VLSI in Computers and Processors).
Chan, John C. ; Womack, Baxter F. ; Wong, D. F. / Manifestation of faults to errors in signature analysis. IEEE International Conference on Computer Design - VLSI in Computers and Processors. Publ by IEEE, 1991. pp. 360-363 (IEEE International Conference on Computer Design - VLSI in Computers and Processors).
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