Low-temperature fabrication of Si thin-film transistor microstructures by soft lithographic patterning on curved and planar substrates

M. K. Erhardt, H. C. Jin, J. R. Abelson, R. G. Nuzzo

Research output: Contribution to journalArticlepeer-review

Abstract

We demonstrate the use of micrometer-scale polymer molding, a soft-lithographic patterning technique, as a means to fabricate amorphous silicon thin-film transistors (TFTs). Two different TFT architectures were fabricated and tested - a common gate, common channel architecture for single-level patterning on a spherically curved glass substrate - and an isolated channel, inverted, staggered architecture with multilevel pattern registration on a planar glass substrate. The silicon and silicon nitride films are deposited by reactive magnetron sputtering, allowing all film depositions to be carried out at temperatures at or below 125 °C, and making this fabrication process a candidate for use on plastic or other thermally sensitive substrates. We discuss the performance of polymer molding as a patterning technique for thin-film microstructures on both planar substrates and on substrates with three-dimensional curvature.

Original languageEnglish (US)
Pages (from-to)3306-3315
Number of pages10
JournalChemistry of Materials
Volume12
Issue number11
DOIs
StatePublished - Dec 1 2000

ASJC Scopus subject areas

  • Chemistry(all)
  • Chemical Engineering(all)
  • Materials Chemistry

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