Low-power technology mapping for mixed-swing logic

N. Dragone, R. A. Rutenbar, L. R. Carley, R. Zafalon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Mixed-swing logic employs multiple power supply rails and device threshold voltages and allows us to create richer cell libraries with a wider range of power/speed tradeoffs. However, mapping onto such a library with a conventional technology mapper will not exploit the full potential of a mixed-swing methodology. To remedy this, we have developed a new technology mapping tool that specifically targets mixed-swing logic. Our approach combines (1) efficient clustering and cluster-level delay budgeting for the uncommitted logic, with (2) an exhaustive search for the optimal cover that is rendered practical by the clustering process. Power savings up to 3X have been demonstrated with our mixed-swing solutions versus single power supply implementations.

Original languageEnglish (US)
Title of host publicationProceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers
Pages291-294
Number of pages4
StatePublished - 2001
Externally publishedYes
EventInternational Symposium on Low Electronics and Design (ISLPED'01) - Huntington Beach, CA, United States
Duration: Aug 6 2001Aug 7 2001

Other

OtherInternational Symposium on Low Electronics and Design (ISLPED'01)
CountryUnited States
CityHuntington Beach, CA
Period8/6/018/7/01

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Dragone, N., Rutenbar, R. A., Carley, L. R., & Zafalon, R. (2001). Low-power technology mapping for mixed-swing logic. In Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers (pp. 291-294)