Low-power signal processing via error-cancellation

Research output: Contribution to journalConference article

Abstract

We present an algorithmic noise-tolerance (ANT) technique for designing low-power DSP systems. The proposed technique achieves substantial energy saving via voltage overscaling, whereby the supply voltage is scaled beyond the minimum supply voltage Vdd-crit at which the architecture operates correctly for a given throughput specification. The resulting input-dependent soft errors are corrected via low-complexity error canceller and hence is referred to as adaptive error-cancellation. The trade-off between energy savings and algorithmic performance is illustrated by employing a reduced-order least mean square (LMS) algorithm to compensate for the design overhead. Simulation results in a 0.35μm CMOS technology demonstrate that the proposed technique achieves up to 73% energy savings in a multiuser communication scenario over present-day voltage-scaling, with a 3dB algorithmic performance loss. Moreover, a 40% energy reduction is obtained over conventional DSP systems without algorithmic performance degradation.

Original languageEnglish (US)
Pages (from-to)553-562
Number of pages10
JournalIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
StatePublished - Dec 1 2000
Event2000 IEEE Workshop on Signal Processing Systems (SIPS 2000) - Lafayette, LA, USA
Duration: Oct 11 2000Oct 13 2000

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ASJC Scopus subject areas

  • Engineering(all)

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