Low-power reduced transistor image sensor

V. Gruev, Z. Yang, J. Van Der Spiegel

Research output: Contribution to journalArticle

Abstract

An image sensor comprising an array of 128 by 50 super pixels, column parallel current conveyors and global difference double sampling (DDS) unit is presented. The super pixel consists of: a reset transistor, a readout transistor, four transfer transistors and four photodiodes. The photo pixel address switch is placed outside the pixel, effectively implementing 1.5 transistors per pixel using a sharing scheme of the readout and reset transistor. The column FPN of 0.43 from saturated level and SNR of 43.9dB is measured. The total power consumption is 5mW at 30 frame/s.

Original languageEnglish (US)
Pages (from-to)780-781
Number of pages2
JournalElectronics Letters
Volume45
Issue number15
DOIs
StatePublished - Aug 18 2009
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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