Abstract
In this paper, we present low-power equalizers derived via dynamic algorithm transformations (DAT). These transformations achieve low-energy operation by reconfiguring the architecture and the supply voltage in response to channel non-stationarities. Practical reconfiguration strategies are derived as a solution to an optimization problem with energy as the objective function and a constraint on the algorithm performance (specifically the SNR). Simple energy models for multipliers are presented. The DAT-based adaptive filter is employed as an equalizer for 51.84 Mb/s very high-speed digital subscriber loop (VDSL) over 24-pair BKMA cable. On the average, 88% energy savings are achieved due to variations in cable length and number of far-end crosstalk (FEXT) interferers.
Original language | English (US) |
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Pages | 317-326 |
Number of pages | 10 |
State | Published - 1998 |
Event | Proceedings of the 1998 IEEE Workshop on Signal Processing Systems, SIPS - Cambridge, MA, USA Duration: Oct 8 1998 → Oct 10 1998 |
Other
Other | Proceedings of the 1998 IEEE Workshop on Signal Processing Systems, SIPS |
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City | Cambridge, MA, USA |
Period | 10/8/98 → 10/10/98 |
ASJC Scopus subject areas
- Signal Processing
- Media Technology