Abstract
Presented in this paper are low-power, reconfigurable adaptive CDMA multiuser receiver architectures developed via dynamic algorithmic transforms (DAT). The architectures achieve low-power operation via run-time reconfiguration of receiver complexity to match the requirements of a time-varying multiuser channel. Simulation results with 0.25 μm, 2.3 V CMOS technology parameters indicate that the proposed architectures have high resistance to the near-far problem, and can achieve up to 60.4% in power savings compared to architectures without DAT depending on the interference situation.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 493-502 |
| Number of pages | 10 |
| Journal | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation |
| State | Published - 1999 |
| Event | 1999 IEEE Workshop on SiGNAL Processing Systems (SiPS 99): 'Design and Implementation' - Taipei, Taiwan Duration: Oct 20 1999 → Oct 22 1999 |
ASJC Scopus subject areas
- General Engineering