@inproceedings{f9791af9322348ab8d06a81352cf78a9,
title = "Low power and error resilient PN code acquisition filter via statistical error compensation",
abstract = "We present a 256-tap PN code acquisition filter in an 180nm CMOS process employing statistical system-level error compensation. Under voltage overscaling (VOS), near constant detection probability (Pdet) above 90% with 5.8x reduction in energy is achieved at a supply voltage 27% below the point of first failure (PoFF) with an error rate (pe) of 0.868. This is an improvement of 5.8x in energy-efficiency over conventional error free designs and 3.79x in energy-efficiency and 2170x in error tolerance over existing error tolerant designs.",
author = "Kim, {Eric P.} and Baker, {Daniel J.} and Sriram Narayanan and Jones, {Douglas L} and Shanbhag, {Naresh R}",
year = "2011",
month = nov,
day = "9",
doi = "10.1109/CICC.2011.6055397",
language = "English (US)",
isbn = "9781457702228",
series = "Proceedings of the Custom Integrated Circuits Conference",
booktitle = "2011 IEEE Custom Integrated Circuits Conference, CICC 2011",
note = "33rd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2011 ; Conference date: 19-09-2011 Through 21-09-2011",
}