Low-power adaptive filter architectures via strength reduction

Manish Goel, Naresh R. Shanbhag

Research output: Contribution to conferencePaperpeer-review

Abstract

Low-power and high-speed algorithms and architectures for complex adaptive filters are presented in this paper. These architectures have been derived via the application of algebraic and algorithm transformations. The strength reduction transformation when applied at the algorithmic level results in a power reduction by 21% as compared to the traditional cross-coupled structure. A fine-grain pipelined architecture is then developed via the relaxed look-ahead transformation. The pipelined architecture allows high-speed operation with minimum overhead and when combined with power-supply reduction enables additional power-savings of 40-69%. Thus, an overall power-saving of 60-90% over the traditional cross-coupled architecture is achieved.

Original languageEnglish (US)
Pages217-220
Number of pages4
StatePublished - 1996
EventProceedings of the 1996 International Symposium on Low Power Electronics and Design - Monterey, CA, USA
Duration: Aug 12 1996Aug 14 1996

Other

OtherProceedings of the 1996 International Symposium on Low Power Electronics and Design
CityMonterey, CA, USA
Period8/12/968/14/96

ASJC Scopus subject areas

  • General Engineering

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