LOPASS: A low-power architectural synthesis system for FPGAs with interconnect estimation and optimization

Keyphrases

• Low Power 100%
• Architectural Synthesis 100%
• Synthesis System 100%
• Field Programmable Gate Arrays 28%
• High-level Synthesis Tools 28%
• Power Consumption 28%
• Clock Period 28%
• Register Binding 28%
• Resource Allocation 14%
• Major Components 14%
• Array Design 14%
• Multiplexer 14%
• Assignment Algorithm 14%
• Compiler 14%
• Power Reduction 14%
• Simulated Annealing Optimization 14%
• Commercial Tools 14%
• Interconnect Power 14%
• Synopsys 14%
• Power Estimation 14%
• Power Estimator 14%
• Allocation Scheduling 14%
• Port Assignment 14%
• Latency Optimization 14%
• Optimization Engine 14%
• Impulse C 14%
• Resource Selection 14%
• Power Optimization 14%

Computer Science

• Architectural Synthesis 100%
• Field Programmable Gate Arrays 100%
• Synthesis Tool 28%
• High Level Synthesis 28%
• Power Consumption 28%
• Register Binding 28%
• Clock Period 28%
• Experimental Result 14%
• Major Component 14%
• Simulated Annealing 14%
• Multiplexer 14%
• Commercial Tool 14%
• Functional Unit Binding 14%