LLVA: A low-level virtual instruction set architecture

V. Adve, C. Lattner, M. Brukman, A. Shukla, B. Gaeke

Research output: Chapter in Book/Report/Conference proceedingConference contribution


A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examples such as Crusoe and DAISY, however, have used existing hardware instruction sets as virtual ISAs, which complicates translation and optimization. In fact, there has been little research on specific designs for a virtual ISA for processors. This paper proposes a novel virtual ISA (LLVA) and a translation strategy for implementing it on arbitrary hardware. The instruction set is typed, uses an infinite virtual register set in static single assignment form, and provides explicit control-flow and dataflow information, and yet uses low-level operations closely matched to traditional hardware. It includes novel mechanisms to allow more flexible optimization of native code, including a flexible exception model and minor constraints on self-modifying code. We propose a translation strategy that enables offline translation and transparent offline caching of native code and profile information, while remaining completely OS-independent. It also supports optimizations directly on the representation at install-time, runtime, and offline between executions. We show experimentally that despite its rich information content, virtual object code is comparable in size to native machine code, virtual instructions expand to only 2-4 ordinary hardware instructions on average, and simple translation costs under 1% of total execution time except for very short runs.

Original languageEnglish (US)
Title of host publicationProceedings - 36th International Symposium on Microarchitecture, MICRO 2003
PublisherIEEE Computer Society
Number of pages12
ISBN (Electronic)076952043X
StatePublished - 2003
Event36th International Symposium on Microarchitecture, MICRO 2003 - San Diego, United States
Duration: Dec 3 2003Dec 5 2003

Publication series

NameProceedings of the Annual International Symposium on Microarchitecture, MICRO
ISSN (Print)1072-4451


Other36th International Symposium on Microarchitecture, MICRO 2003
Country/TerritoryUnited States
CitySan Diego


  • Application software
  • Computer aided instruction
  • Computer architecture
  • Computer science
  • Hardware
  • Instruction sets
  • Microarchitecture
  • Operating systems
  • Process design
  • Registers

ASJC Scopus subject areas

  • Hardware and Architecture


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