@inproceedings{4dad9e9876f94fe69243a81eab23d05c,
title = "LIM Algorithms for Diodes and Branch Capacitors",
abstract = "The latency insertion method (LIM) has been demonstrated as an optimum algorithm for the transient simulation of large networks. However, several network topologies and circuit elements do not lead to a LIM-compatible formulation. This work addresses the derivation of LIM expressions for non-standard topologies and elements. In particular, we address the formulation for nonlinear elements and branch capacitors. Examples and comparisons are given for evaluating the algorithms.",
keywords = "latency, simulation, time step, transient",
author = "Jose Schutt-Aine and Patrick Goh",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2018 ; Conference date: 16-12-2018 Through 18-12-2018",
year = "2018",
month = jul,
day = "2",
doi = "10.1109/EDAPS.2018.8680874",
language = "English (US)",
series = "IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2018",
address = "United States",
}