Leveraging power-performance relationship of energy-efficient modern DRAM devices

Sukhan Lee, Hyunyoon Cho, Young Hoon Son, Yuhwan Ro, Nam Sung Kim, Jung Ho Ahn

Research output: Contribution to journalArticlepeer-review


Computer servers are equipped with an increasing number of memory modules each with more capacity, making main-memory systems now the second most energy-consuming component trailing only processors in big-memory servers. These big-memory servers and their main-memory systems should offer high energy efficiency. In pursuit of energy-efficient main-memory systems, prior work exploited mobile low power double data rate (LPDDR) devices' advantages (lower power than DDR devices) while attempting to surmount their limitations (longer latency, lower bandwidth, or both). However, we show that such main-memory architectures (based on the latest LPDDR4 devices) are no longer effective and even hurt overall energy efficiency of servers by 49% on memory-intensive workloads compared with ones based on DDR4 devices. The reason is that the power consumption of modern DDR4 devices has substantially reduced by adopting the strength of mobile and graphics memory whereas LPDDR4 has focused more on increasing data transfer rates while sacrificing energy efficiency; the power consumption of DDR4 devices can significantly vary across manufacturers in this analysis. Moreover, exploring new energy-saving features of DDR4 devices in depth, we show that activating these features often hurts overall energy efficiency of servers because of their performance penalties. Subsequently, we propose a simple but effective scheme that adaptively exploits DRAM power-down modes and hence improves the system energy-delay product by 4.0%.

Original languageEnglish (US)
Pages (from-to)31387-31398
Number of pages12
JournalIEEE Access
StatePublished - 2018


  • Computer performance
  • energy efficiency

ASJC Scopus subject areas

  • Computer Science(all)
  • Materials Science(all)
  • Engineering(all)


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