Layout tools for analog ICs and mixed-signal SoCs: A survey

Robin A Rutenbar, John M. Cohn

Research output: Contribution to conferencePaperpeer-review


Layout for analog circuits has historically been a time-consuming, manual, trial-and-error task. The problem is not so much the size (in terms of the number of active devices) of these designs, but rather the plethora of possible circuit and device interactions: from the chip substrate, from the devices and interconnects themselves, from the chip package. In this short survey we enumerate briefly the basic problems faced by those who need to do layout for analog and mixed-signal designs, and survey the evolution of the design tools and geometric/electrical optimization algorithms that have been directed at these problems.

Original languageEnglish (US)
Number of pages8
StatePublished - 2000
EventISPD-2000: International Symposium on Physical Design - San Diego, CA, USA
Duration: Apr 9 2000Apr 12 2000


ConferenceISPD-2000: International Symposium on Physical Design
CitySan Diego, CA, USA

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


Dive into the research topics of 'Layout tools for analog ICs and mixed-signal SoCs: A survey'. Together they form a unique fingerprint.

Cite this