TY - GEN
T1 - Layout guidelines for optimized ESD protection diodes
AU - Bhatia, Karan
AU - Rosenbaum, Elyse
PY - 2007
Y1 - 2007
N2 - In this work, various layout options for ESD diodes' PN junction geometry and metal routing are investigated. The current compression point (I CP) is introduced to define the maximum current handling capability of ESD protection devices. The figures-of-merit ICP/C and RON*C are used to compare the performance of the structures investigated herein.
AB - In this work, various layout options for ESD diodes' PN junction geometry and metal routing are investigated. The current compression point (I CP) is introduced to define the maximum current handling capability of ESD protection devices. The figures-of-merit ICP/C and RON*C are used to compare the performance of the structures investigated herein.
UR - http://www.scopus.com/inward/record.url?scp=51849090104&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=51849090104&partnerID=8YFLogxK
U2 - 10.1109/EOSESD.2007.4401727
DO - 10.1109/EOSESD.2007.4401727
M3 - Conference contribution
AN - SCOPUS:51849090104
SN - 158537136X
SN - 9781585371365
T3 - Electrical Overstress/Electrostatic Discharge Symposium Proceedings
SP - 1A.31-1A.39
BT - 2007 29th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD
T2 - 2007 29th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD
Y2 - 16 September 2007 through 21 September 2007
ER -