Layer assignment for high-performance multi-chip modules

Kai Yuan Chao, Martin D F Wong

Research output: Contribution to journalArticle

Abstract

In this paper, we present a layer assignment method for high-performance multi-chip module environments. In contrast with treating global routing and layer assignment separately, our method assigns nets to layers while considering preferable global routing topologies simultaneously. We take transmission line effects into account to avoid noise in high-speed circuit packages. The problem is formulated as a quadratic Boolean programming problem and an algorithm is presented to solve the problem after linearization. Our method is applied to a set of benchmark circuits to demonstrate the effectiveness.

Original languageEnglish (US)
Pages (from-to)680-685
Number of pages6
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
StatePublished - 1994
Externally publishedYes

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Computer Science Applications
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Layer assignment for high-performance multi-chip modules'. Together they form a unique fingerprint.

  • Cite this