Abstract
In this paper, we present a layer assignment method for high-performance multi-chip module environments. In contrast with treating global routing and layer assignment separately, our method assigns nets to layers while considering preferable global routing topologies simultaneously. We take transmission line effects into account to avoid noise in high-speed circuit packages. The problem is formulated as a quadratic Boolean programming problem and an algorithm is presented to solve the problem after linearization. Our method is applied to a set of benchmark circuits to demonstrate the effectiveness.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 680-685 |
| Number of pages | 6 |
| Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
| State | Published - 1994 |
| Externally published | Yes |
| Event | Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design - San Jose, CA, USA Duration: Nov 6 1994 → Nov 10 1994 |
ASJC Scopus subject areas
- Software
- Electrical and Electronic Engineering
- Computer Graphics and Computer-Aided Design