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Latency insertion method (LIM) for DC analysis of power supply networks
Dmitri Klokotov
, Patrick Goh
,
José E. Schutt-Ainé
Electrical and Computer Engineering
Coordinated Science Lab
Research output
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›
peer-review
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Keyphrases
Latency Insertion Method
100%
Power Supply Network
100%
DC Analysis
100%
Order of Magnitude
33%
Random Walk Algorithm
33%
Simulation Techniques
33%
Integrated Circuits
33%
Design Challenges
33%
Rigorous Analysis
33%
Steady-state Analysis
33%
Reliable Performance
33%
Node number
33%
Numerical Tools
33%
Multiple Signals
33%
Power Grid
33%
Signal Integrity
33%
Rigorous Simulation
33%
Power Integrity
33%
Process Scale-up
33%
On-chip Power
33%
Fast Circuit Simulation
33%
On-chip Power Delivery
33%
On-chip Power Distribution Networks
33%
Power Grid Analysis
33%
Large-scale Circuits
33%
Engineering
Power Grid
100%
Network Power Supply
100%
Nodes
50%
Simulation Technique
50%
Power Supply
50%
Steady State Analysis
50%
Rigorous Analysis
50%
Electric Power Distribution
50%
Power Distribution
50%
Design Stage
50%
Scaling Process
50%
Reliable Performance
50%
Integrated Circuit
50%