TY - GEN
T1 - Latency Insertion Method for Fast Electro-Thermal Simulation of FinFET with Self-Heating Effect
AU - Zhou, Yi
AU - Schutt-Ainé, José E.
N1 - This material is based upon work supported by the U.S Army Small Business Innovation Research (SBIR) Program office and the U.S. Army Research Office under Contract No.W911NF-15-P-0005 and by Zhejiang University under the Dynamic Research Enterprise for Multidisciplinary Engineering Sciences (DREMES) program.
PY - 2024
Y1 - 2024
N2 - Self-heating effect (SHE) is prominent for FinFET devices due to their large currents and compact sizes. With SHE, the power in FinFETs is dissipated into heat, affecting device performance. Thus, fast and accurate electro-thermal analysis of FinFETs incorporating SHE is important. This paper proposes the Latency Insertion Method (LIM) algorithm for fast FinFET electro-thermal simulation with SHE. Based on the BSIM-CMG model, the proposed method leapfrogs between the conventional electrical LIM algorithm and the thermal equations. The LIM results are compared to SPICE-based commercial software to prove the accuracy and the speed.
AB - Self-heating effect (SHE) is prominent for FinFET devices due to their large currents and compact sizes. With SHE, the power in FinFETs is dissipated into heat, affecting device performance. Thus, fast and accurate electro-thermal analysis of FinFETs incorporating SHE is important. This paper proposes the Latency Insertion Method (LIM) algorithm for fast FinFET electro-thermal simulation with SHE. Based on the BSIM-CMG model, the proposed method leapfrogs between the conventional electrical LIM algorithm and the thermal equations. The LIM results are compared to SPICE-based commercial software to prove the accuracy and the speed.
KW - BSIM-CMG
KW - FinFET
KW - circuit simulation
KW - electro-thermal simulation
KW - latency insertion method
KW - self-heating effect
UR - http://www.scopus.com/inward/record.url?scp=85212684171&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85212684171&partnerID=8YFLogxK
U2 - 10.1109/EPEPS61853.2024.10754220
DO - 10.1109/EPEPS61853.2024.10754220
M3 - Conference contribution
AN - SCOPUS:85212684171
T3 - 33rd IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2024
BT - 33rd IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 33rd IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2024
Y2 - 6 October 2024 through 9 October 2024
ER -