@inproceedings{9855bc391d5142edac1ac1418ba8432e,
title = "Late breaking results: Distributed timing analysis at scale",
abstract = "As the design complexities continue to grow, the need to efficiently analyze circuit timing with billions of transistors is quickly becoming the major bottleneck to the overall chip design flow. In this work we introduce a distributed timer that (1) has scalable performance, (2) can be seamless integrable to existing EDA applications, (3) enables transparent resource management, (4) has robust faulttolerant control. We evaluate the distributed timer using a set of large industry benchmarks on a cluster with 24 nodes. The results show that the proposed timer achieves full accuracy over all designs with high performance and good scalability.",
author = "Huang, {Tsung Wei} and Lin, {Chun Xun} and Wong, {Martin D.F.}",
note = "Publisher Copyright: {\textcopyright} 2019 Association for Computing Machinery.; 56th Annual Design Automation Conference, DAC 2019 ; Conference date: 02-06-2019 Through 06-06-2019",
year = "2019",
month = jun,
day = "2",
doi = "10.1145/3316781.3322470",
language = "English (US)",
series = "Proceedings - Design Automation Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019",
address = "United States",
}