Kinetics of salicide contact formation for thin-film soi transistors

M. A. Mendicino, E. G. Seebauer

Research output: Contribution to journalArticlepeer-review

Abstract

Problems of voiding and poor contact resistance have plagued recent attempts to apply salicide technology to silicon-on-insulator (S01) transistors. A physical picture is developed to explain why these problems occur. The picture rests on the known kinetics of silicide formation and the resistance to silicon diffusion imposed by device geometry.

Original languageEnglish (US)
Pages (from-to)L28-L30
JournalJournal of the Electrochemical Society
Volume142
Issue number2
DOIs
StatePublished - Feb 1995

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Renewable Energy, Sustainability and the Environment
  • Surfaces, Coatings and Films
  • Electrochemistry
  • Materials Chemistry

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