Abstract
This article proposes an isochronous architecture for parallel inverters with only voltage-active power droop (VP-D) control for improving active power sharing as well as plug-and-play of multi-inverter-based distributed energy resources (DERs). The isochronous framework obviates the need for an explicit regulation of the frequency while allowing for sharing of reactive power. The article demonstrates that the detrimental effects of circulating currents between inverters can be addressed in the framework developed. The isochronous architecture is implemented by employing a GPS to disseminate clock timing signals that enable the microgrid to maintain the nominal system frequency. Small signal eigenvalue analysis of a Multi-inverter Microgrid system near the steady-state operating point is presented to evaluate the system stability. Moreover, unlike traditional droop-based methods, the isochronous strategy lends itself to analytical guarantees which are developed in the article. Furthermore, the effect of delays in receiving GPS clock signals by an inverter is experimentally characterized and an inverter isolation mechanism is proposed that disconnects inverters facing large GPS communication delays. Hardware experiments on an 1.2 kVA-prototype and controller-hardware-in-the-loop validation on the CIGRE distribution network are conducted to demonstrate the effectiveness of the proposed architecture towards active and reactive power sharing between inverters with various load scenarios.
Original language | English (US) |
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Article number | 18 |
Pages (from-to) | 1088-1103 |
Number of pages | 16 |
Journal | IEEE Transactions on Smart Grid |
Volume | 12 |
Issue number | 2 |
DOIs | |
State | Published - Mar 2021 |
Keywords
- Common-clock/GPS
- low-voltage multi-inverter microgrid
- virtual impedance
- voltage active power droop
ASJC Scopus subject areas
- General Computer Science