TY - GEN
T1 - IR drop and ground bounce awareness timing model
AU - Shao, Muzhou
AU - Gao, Youxin
AU - Yuan, Li Pen
AU - Wong, Martin D.F.
PY - 2005
Y1 - 2005
N2 - As the IC technology scales down, the effect of IR drop/ground bounce becomes increasingly significant. IR drop and ground bounce can compromise the gate driving capability and degrade the IC performance, and even can make IC functional failures. Hence, it is crucial to capture this effect efficiently and accurately in order to improve circuit reliability. In this paper, we proposed a timing model with consideration of IR drop and ground bounce. Our model can be derived directly from the existing timing tables (e.g. Synopsys db or CLF tables), which are used in normal timing analysis. Compared with the traditional k-factor approach, our method does not require SPICE netlist and SPICE simulations. Moreover, the accuracy of our model is better than k-factor approach.
AB - As the IC technology scales down, the effect of IR drop/ground bounce becomes increasingly significant. IR drop and ground bounce can compromise the gate driving capability and degrade the IC performance, and even can make IC functional failures. Hence, it is crucial to capture this effect efficiently and accurately in order to improve circuit reliability. In this paper, we proposed a timing model with consideration of IR drop and ground bounce. Our model can be derived directly from the existing timing tables (e.g. Synopsys db or CLF tables), which are used in normal timing analysis. Compared with the traditional k-factor approach, our method does not require SPICE netlist and SPICE simulations. Moreover, the accuracy of our model is better than k-factor approach.
UR - http://www.scopus.com/inward/record.url?scp=26844468118&partnerID=8YFLogxK
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M3 - Conference contribution
AN - SCOPUS:26844468118
SN - 076952365X
SN - 9780769523651
T3 - Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI
SP - 226
EP - 231
BT - Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design
A2 - Smailagic, A.
A2 - Ranganathan, N.
T2 - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design
Y2 - 11 May 2005 through 12 May 2005
ER -