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Keyphrases
Buffer Blocking
14%
Buffer Planning
14%
Cost Optimization
100%
Cost Reduction
28%
Design Cost
100%
Design Inputs
14%
Design Optimization
14%
Design Performance
100%
Flip-chip Design
100%
Flip-chip Technology
14%
Input-output
100%
Input-output Clustering
100%
Integrated Circuit Design
14%
Integrity Preserving
14%
Long Wires
14%
Microelectronic Center of North Carolina
14%
Minimum Cost Flow Problem
14%
Output Buffer
28%
Performance Optimization
100%
Placement Constraints
14%
Power Network
14%
Product Failure
14%
Signal Integrity
14%
Standard Cell Placement
14%
Technology Input
14%
Timing Performance
14%
Traditional Rule
14%
Voltage Drop
14%
Wirelength
14%
Engineering
Buffer Block
50%
Circuit Designer
50%
Cost Reduction
100%
Early Stage
50%
Experimental Result
50%
Flow Problem
50%
Integrated Circuit Design
50%
Microelectronics
50%
Placement Constraint
50%
Product Failure
50%
Voltage Drop
50%