The detector readout bandwidth is of paramount importance to achieve a high count rate and thus a high sensitivity. For detectors with the number of readout channels larger than that of the application-specific integrated circuit (ASIC), multiple ASICs are required. In systems with such a readout scheme, it is important to consider the load balance to achieve the highest count rate. In this work, a Monte Carlo simulation was performed to investigate the bandwidths of different load balancing configurations between two ASICs in a cross-strip cadmium zinc telluride detector. It is found that for anode strips, allocating each ASIC to half of the detector area provides a higher bandwidth when compared to allocating ASIC channels to alternate anode channels. Cathodes that are closer to the field of view will trigger more often and require a more complex load balancing scheme. Charge sharing and scattering play a role in the different bandwidths, and the bandwidth of the half-half configuration is 2.82% higher than that of the alternate configuration.
- Application-specific integrated circuit
- Cadmium zinc telluride
- Channel configuration
- Cross-strip pattern
ASJC Scopus subject areas