InAs nanowire gate-all-around MOSFETs by heterogeneous planar VLS growth

Chen Zhang, Wonsik Choi, Parsian Mohseni, Xiuling Li

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

High Indium content (In%) InGaAs is a promising channel material to extend Si based CMOS technology [1]. However, due to its huge lattice mismatch with commercially available III-V substrates (GaAs or InP), it is difficult to grow high In% film beyond the ultra-thin critical thickness, and therefore difficult to obtain the in-plane nanowires (NWs) based on top-down etching of a thin-film structure. Here we directly grow InAs planar NWs heterogeneously on GaAs (100) via the vapor-liquid-solid (VLS) mechanism [2] and demonstrate a planar NW gate-all-around (GAA) MOSFET device. Despite a 6.7% lattice mismatch between InAs and GaAs (leading to a critical thickness below 1 nm for thin-film growth), high-quality InAs NWs are realized, enabling good electrical performance of MOSFET with a planar InAs NW as the channel. This technology also provides a potential solution for integrating planar NW channels of different materials on a single substrate.

Original languageEnglish (US)
Title of host publication73rd Annual Device Research Conference, DRC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages181-182
Number of pages2
ISBN (Electronic)9781467381345
DOIs
StatePublished - Aug 3 2015
Event73rd Annual Device Research Conference, DRC 2015 - Columbus, United States
Duration: Jun 21 2015Jun 24 2015

Publication series

NameDevice Research Conference - Conference Digest, DRC
Volume2015-August
ISSN (Print)1548-3770

Other

Other73rd Annual Device Research Conference, DRC 2015
Country/TerritoryUnited States
CityColumbus
Period6/21/156/24/15

Keywords

  • Gallium arsenide
  • Lead
  • Logic gates
  • Nickel

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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