Improvement of hot carrier reliability with deuterium anneals for manufacturing multilevel metal/dielectric MOS systems

I. C. Kizilyalli, G. C. Abeln, Z. Chen, J. Lee, G. Weber, B. Kotzias, S. Chetlur, J. W. Lyding, K. Hess

Research output: Contribution to journalArticle

Abstract

This paper discusses new experimental findings critical for process integration of deuterium post-metal anneals to improve channel hot carrier reliability in manufacturing multilevel metal CMOS integrated circuits. Detailed account of the deuterium process optimization experiments varying temperature, time, and ambient Is given. Specifically, the first demonstration of the large hydrogen/deuterium isotope effect for multilevel metal/dielectric MOS systems is reported. Previous accounts of the isotope effect had been limited to CMOS structures with one-level of dielectric/metal and to about a 10 fold improvement in reliability. Deuterium, instead of hydrogen is introduced via an optimized post-metal anneal process to achieve a 50-100 fold improvement in transistor channel hot carrier lifetime. The benefits of the deuterium anneal art still observed even if the post-metal anneal is followed by the final SiN cap wafer passivation process. It is concluded that the deuterium post-metal anneal process is suitable for manufacturing high performance CMOS products and fully compatible with traditional integrated circuit processes.

Original languageEnglish (US)
Pages (from-to)444-446
Number of pages3
JournalIEEE Electron Device Letters
Volume19
Issue number11
DOIs
StatePublished - Nov 1 1998

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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