TY - GEN
T1 - Implementation of a parallel prolog interpreter on multiprocessors
AU - Kalé, Laxmikant V.
AU - Ramkumar, Balkrishna
N1 - Publisher Copyright:
© 1991 IEEE.
PY - 1991
Y1 - 1991
N2 - We describe the implementation of the Reduce-OR process model for the parallel execution of logic programs in an interpreter for parallel Prolog. The interpreter supports full OR and independent AND parallelism in logic programs on both shared and nonshared memory machines. The process model has been implemented on top of a run time support system called the Chare Kernel The Chare Kernel makes it possible to keep the interpreter machine independent by assuming responsibility for dynamic load balancing, scheduling, memory and task queue management. The interpreter currently runs on the Sequent Balance, the Alliant FX/8, the Encore Multimax and the Intel iPSC/2 hypercube. This implementation provides valuable information for the design and development of a compiler for the Reduce- OR process model.
AB - We describe the implementation of the Reduce-OR process model for the parallel execution of logic programs in an interpreter for parallel Prolog. The interpreter supports full OR and independent AND parallelism in logic programs on both shared and nonshared memory machines. The process model has been implemented on top of a run time support system called the Chare Kernel The Chare Kernel makes it possible to keep the interpreter machine independent by assuming responsibility for dynamic load balancing, scheduling, memory and task queue management. The interpreter currently runs on the Sequent Balance, the Alliant FX/8, the Encore Multimax and the Intel iPSC/2 hypercube. This implementation provides valuable information for the design and development of a compiler for the Reduce- OR process model.
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U2 - 10.1109/IPPS.1991.153834
DO - 10.1109/IPPS.1991.153834
M3 - Conference contribution
AN - SCOPUS:85067464573
T3 - Proceedings - 5th International Parallel Processing Symposium, IPPS 1991
SP - 543
EP - 548
BT - Proceedings - 5th International Parallel Processing Symposium, IPPS 1991
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 5th International Parallel Processing Symposium, IPPS 1991
Y2 - 30 April 1991 through 2 May 1991
ER -