Impact of lithography retargeting process on low level interconnect in 20nm technology

Hongbo Zhang, Yunfei Deng, Jongwook Kye, Martin D F Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As the lithography continues to be the biggest challenge in 20 nm technology node, the process windows become a serious concern to handle more severe process variations for better printability and yield. The mask pattern modification that is to set the printing target as the original designed patterns under the best focus, such as OPC and SRAF, becomes insufficient. With the random space and width existing in the low level interconnect layer, a process called "retargeting" to change the original line width or space for better process windows becomes much more important and noticeable. Therefore, a study of retargeting impact on interconnect becomes a must. In this paper, we are focusing on the low level metal layer to demonstrate the retargeting impact on the delay. By the test benches that we build to enumerate all the possible changes during retargeting, we analyze the worst case scenario impact for a worry-free retargeting process. We also successfully generate a compact model to predict the retargeting impact. Experimental results verify our estimation model for the retargeting's impact on the preferred and non-preferred direction, and little error is found for our compact model.

Original languageEnglish (US)
Title of host publicationProceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12
Pages3-10
Number of pages8
DOIs
StatePublished - Sep 26 2012
EventInternational Workshop on System Level Interconnect Prediction, SLIP 2012 - San Francisco, CA, United States
Duration: Jun 3 2012Jun 3 2012

Publication series

NameInternational Workshop on System Level Interconnect Prediction, SLIP

Other

OtherInternational Workshop on System Level Interconnect Prediction, SLIP 2012
CountryUnited States
CitySan Francisco, CA
Period6/3/126/3/12

Fingerprint

Interconnect
Lithography
Process Window
Linewidth
Printing
Masks
Process Variation
Mask
Metals
Continue
Model
Verify
Predict
Scenarios
Target
Experimental Results
Vertex of a graph
Demonstrate

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Applied Mathematics

Cite this

Zhang, H., Deng, Y., Kye, J., & Wong, M. D. F. (2012). Impact of lithography retargeting process on low level interconnect in 20nm technology. In Proceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12 (pp. 3-10). (International Workshop on System Level Interconnect Prediction, SLIP). https://doi.org/10.1145/2347655.2347659

Impact of lithography retargeting process on low level interconnect in 20nm technology. / Zhang, Hongbo; Deng, Yunfei; Kye, Jongwook; Wong, Martin D F.

Proceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12. 2012. p. 3-10 (International Workshop on System Level Interconnect Prediction, SLIP).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zhang, H, Deng, Y, Kye, J & Wong, MDF 2012, Impact of lithography retargeting process on low level interconnect in 20nm technology. in Proceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12. International Workshop on System Level Interconnect Prediction, SLIP, pp. 3-10, International Workshop on System Level Interconnect Prediction, SLIP 2012, San Francisco, CA, United States, 6/3/12. https://doi.org/10.1145/2347655.2347659
Zhang H, Deng Y, Kye J, Wong MDF. Impact of lithography retargeting process on low level interconnect in 20nm technology. In Proceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12. 2012. p. 3-10. (International Workshop on System Level Interconnect Prediction, SLIP). https://doi.org/10.1145/2347655.2347659
Zhang, Hongbo ; Deng, Yunfei ; Kye, Jongwook ; Wong, Martin D F. / Impact of lithography retargeting process on low level interconnect in 20nm technology. Proceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12. 2012. pp. 3-10 (International Workshop on System Level Interconnect Prediction, SLIP).
@inproceedings{00ebe742fc4f49a5a89df96a0bc9a1b6,
title = "Impact of lithography retargeting process on low level interconnect in 20nm technology",
abstract = "As the lithography continues to be the biggest challenge in 20 nm technology node, the process windows become a serious concern to handle more severe process variations for better printability and yield. The mask pattern modification that is to set the printing target as the original designed patterns under the best focus, such as OPC and SRAF, becomes insufficient. With the random space and width existing in the low level interconnect layer, a process called {"}retargeting{"} to change the original line width or space for better process windows becomes much more important and noticeable. Therefore, a study of retargeting impact on interconnect becomes a must. In this paper, we are focusing on the low level metal layer to demonstrate the retargeting impact on the delay. By the test benches that we build to enumerate all the possible changes during retargeting, we analyze the worst case scenario impact for a worry-free retargeting process. We also successfully generate a compact model to predict the retargeting impact. Experimental results verify our estimation model for the retargeting's impact on the preferred and non-preferred direction, and little error is found for our compact model.",
author = "Hongbo Zhang and Yunfei Deng and Jongwook Kye and Wong, {Martin D F}",
year = "2012",
month = "9",
day = "26",
doi = "10.1145/2347655.2347659",
language = "English (US)",
isbn = "9781450314374",
series = "International Workshop on System Level Interconnect Prediction, SLIP",
pages = "3--10",
booktitle = "Proceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12",

}

TY - GEN

T1 - Impact of lithography retargeting process on low level interconnect in 20nm technology

AU - Zhang, Hongbo

AU - Deng, Yunfei

AU - Kye, Jongwook

AU - Wong, Martin D F

PY - 2012/9/26

Y1 - 2012/9/26

N2 - As the lithography continues to be the biggest challenge in 20 nm technology node, the process windows become a serious concern to handle more severe process variations for better printability and yield. The mask pattern modification that is to set the printing target as the original designed patterns under the best focus, such as OPC and SRAF, becomes insufficient. With the random space and width existing in the low level interconnect layer, a process called "retargeting" to change the original line width or space for better process windows becomes much more important and noticeable. Therefore, a study of retargeting impact on interconnect becomes a must. In this paper, we are focusing on the low level metal layer to demonstrate the retargeting impact on the delay. By the test benches that we build to enumerate all the possible changes during retargeting, we analyze the worst case scenario impact for a worry-free retargeting process. We also successfully generate a compact model to predict the retargeting impact. Experimental results verify our estimation model for the retargeting's impact on the preferred and non-preferred direction, and little error is found for our compact model.

AB - As the lithography continues to be the biggest challenge in 20 nm technology node, the process windows become a serious concern to handle more severe process variations for better printability and yield. The mask pattern modification that is to set the printing target as the original designed patterns under the best focus, such as OPC and SRAF, becomes insufficient. With the random space and width existing in the low level interconnect layer, a process called "retargeting" to change the original line width or space for better process windows becomes much more important and noticeable. Therefore, a study of retargeting impact on interconnect becomes a must. In this paper, we are focusing on the low level metal layer to demonstrate the retargeting impact on the delay. By the test benches that we build to enumerate all the possible changes during retargeting, we analyze the worst case scenario impact for a worry-free retargeting process. We also successfully generate a compact model to predict the retargeting impact. Experimental results verify our estimation model for the retargeting's impact on the preferred and non-preferred direction, and little error is found for our compact model.

UR - http://www.scopus.com/inward/record.url?scp=84866479164&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84866479164&partnerID=8YFLogxK

U2 - 10.1145/2347655.2347659

DO - 10.1145/2347655.2347659

M3 - Conference contribution

AN - SCOPUS:84866479164

SN - 9781450314374

T3 - International Workshop on System Level Interconnect Prediction, SLIP

SP - 3

EP - 10

BT - Proceedings of the International Workshop on System Level Interconnect Prediction, SLIP'12

ER -