Impact of dislocation densities on n ⁺/p and p ⁺/n junction GaAs diodes and solar cells on SiGe virtual substrates

Recent experimental measurements have shown that in GaAs with elevated threading dislocation densities (TDDs) the electron lifetime is much lower than the hole lifetime [C. L. Andre, J. J. Boeckl, D. M. Wilt, A. J. Pitera, M. L. Lee, E. A. Fitzgerald, B. M. Keyes, and S. A. Ringel, Appl. Phys. Lett. 84, 3884 (2004)]. This lower electron lifetime suggests an increase in depletion region recombination and thus in the reverse saturation current (J0 for an n+ p diode compared with a p+ n diode at a given TDD. To confirm this, GaAs diodes of both polarities were grown on compositionally graded Ge Si1-x Gex Si (SiGe) substrates with a TDD of 1× 106 cm-2. It is shown that the ratio of measured J0 values is consistent with the inverse ratio of the expected lifetimes. Using a TDD-dependent lifetime in solar cell current-voltage models we found that the Voc, for a given short-circuit current, also exhibits a poorer TDD tolerance for GaAs n+ p solar cells compared with GaAs p+ n solar cells. Experimentally, the open-circuit voltage (Voc) for the n+ p GaAs solar cell grown on a SiGe substrate with a TDD of ∼1× 106 cm-2 was ∼880 mV which was significantly lower than the ∼980 mV measured for a p+ n GaAs solar cell grown on SiGe at the same TDD and was consistent with the solar cell modeling results reported in this paper. We conclude that p+ n polarity GaAs junctions demonstrate superior dislocation tolerance than n+ p configured GaAs junctions, which is important for optimization of lattice-mismatched III-V devices.