TY - GEN
T1 - Impact of dimensional scaling and size effects on beyond CMOS All-Spin Logic interconnects
AU - Iraei, Rouhollah Mousavi
AU - Bonhomme, Phillip
AU - Kani, Nickvash
AU - Manipatruni, Sasikanth
AU - Nikonov, Dmitri E.
AU - Young, Ian A.
AU - Naeemi, Azad
PY - 2014
Y1 - 2014
N2 - The energy-per-bit and delay of All-Spin Logic (ASL) interconnects have been modeled. Both Al and Cu interconnect channels have been considered and the impact of size effects and dimensional scaling on their potential performance has been quantified. It is predicted that size effects will affect ASL interconnects more severely than electrical interconnects.
AB - The energy-per-bit and delay of All-Spin Logic (ASL) interconnects have been modeled. Both Al and Cu interconnect channels have been considered and the impact of size effects and dimensional scaling on their potential performance has been quantified. It is predicted that size effects will affect ASL interconnects more severely than electrical interconnects.
UR - https://www.scopus.com/pages/publications/84903708784
UR - https://www.scopus.com/pages/publications/84903708784#tab=citedBy
U2 - 10.1109/IITC.2014.6831833
DO - 10.1109/IITC.2014.6831833
M3 - Conference contribution
AN - SCOPUS:84903708784
SN - 9781479950164
T3 - 2014 IEEE International Interconnect Technology Conference / Advanced Metallization Conference, IITC/AMC 2014
SP - 353
EP - 356
BT - 2014 IEEE International Interconnect Technology Conference / Advanced Metallization Conference, IITC/AMC 2014
PB - IEEE Computer Society
T2 - 2014 IEEE International Interconnect Technology Conference / Advanced Metallization Conference, IITC/AMC 2014
Y2 - 20 May 2014 through 23 May 2014
ER -