IMPACT: An architectural framework for multiple-instruction-issue processors

Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-Mei W Hwu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The optimization capabilities of the IMPACT-I C compiler are summarized. Using this compiler, the authors ran experiments to analyze the performance of multiple-instruction-issue processors executing some important non-numerical programs. The processors achieved solid speedup over high-performance single-instruction-issue processors. The authors also ran experiments to characterize the following architectural design issues: code scheduling model, instruction issue rate, memory load latency, and function unit resource limitations. On the basis of the experimental results, they propose the IMPACT architectural framework, a set of architectural features that best support the IMPACT-I C compiler to generate efficient code for multiple-instruction-issue processors. By supporting these architectural features, multiple-instruction-issue implementations of existing and new architectures receive immediate compilation support from the IMPACT-I C compiler.

Original languageEnglish (US)
Title of host publicationConference Proceedings - Annual Symposium on Computer Architecture
PublisherPubl by IEEE
Pages266-275
Number of pages10
ISBN (Print)0897913949
StatePublished - May 1 1991
EventProceedings of the 18th International Symposium on Computer Architecture - Toronto, Ont, Can
Duration: May 27 1991May 30 1991

Publication series

NameConference Proceedings - Annual Symposium on Computer Architecture
ISSN (Print)0149-7111

Other

OtherProceedings of the 18th International Symposium on Computer Architecture
CityToronto, Ont, Can
Period5/27/915/30/91

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Chang, P. P., Mahlke, S. A., Chen, W. Y., Warter, N. J., & Hwu, W-M. W. (1991). IMPACT: An architectural framework for multiple-instruction-issue processors. In Conference Proceedings - Annual Symposium on Computer Architecture (pp. 266-275). (Conference Proceedings - Annual Symposium on Computer Architecture). Publ by IEEE.