Abstract
This paper presents an approach for the transient simulation of I/O buffers described by IBIS models. Using the latency insertion method, a formulation can be obtained for the transient behavior of IBIS models combined with external circuitry. The formulation offers better convergence than traditional Newton-Raphson methods and is therefore more robust. The method also implements the BIRD95 and BIRD98 updates that account for predriver current, simultaneous switching noise, and gate modulation effects. Several computer simulations are performed to validate the method.
| Original language | English (US) |
|---|---|
| Article number | 6515598 |
| Pages (from-to) | 1228-1236 |
| Number of pages | 9 |
| Journal | IEEE Transactions on Components, Packaging and Manufacturing Technology |
| Volume | 3 |
| Issue number | 7 |
| DOIs | |
| State | Published - 2013 |
Keywords
- Input/output buffer information specification (IBIS)
- latency insertion method (LIM)
- simultaneous switching noise (SSN)
- transient simulation
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Industrial and Manufacturing Engineering
- Electrical and Electronic Engineering