HPSM2: A REFINED SINGLE-CHIP MICROENGINE.

Wen-Mei W Hwu, Yale N. Patt

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33% performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.

Original languageEnglish (US)
Title of host publicationProceedings of the Hawaii International Conference on System Science
EditorsLee W. Hoevel, Dayton NCR Corp
PublisherIEEE
Pages30-40
Number of pages11
ISBN (Print)0818608412
StatePublished - 1988

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Hardware

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Hwu, W-M. W., & Patt, Y. N. (1988). HPSM2: A REFINED SINGLE-CHIP MICROENGINE. In L. W. Hoevel, & D. NCR Corp (Eds.), Proceedings of the Hawaii International Conference on System Science (pp. 30-40). IEEE.

HPSM2 : A REFINED SINGLE-CHIP MICROENGINE. / Hwu, Wen-Mei W; Patt, Yale N.

Proceedings of the Hawaii International Conference on System Science. ed. / Lee W. Hoevel; Dayton NCR Corp. IEEE, 1988. p. 30-40.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hwu, W-MW & Patt, YN 1988, HPSM2: A REFINED SINGLE-CHIP MICROENGINE. in LW Hoevel & D NCR Corp (eds), Proceedings of the Hawaii International Conference on System Science. IEEE, pp. 30-40.
Hwu W-MW, Patt YN. HPSM2: A REFINED SINGLE-CHIP MICROENGINE. In Hoevel LW, NCR Corp D, editors, Proceedings of the Hawaii International Conference on System Science. IEEE. 1988. p. 30-40
Hwu, Wen-Mei W ; Patt, Yale N. / HPSM2 : A REFINED SINGLE-CHIP MICROENGINE. Proceedings of the Hawaii International Conference on System Science. editor / Lee W. Hoevel ; Dayton NCR Corp. IEEE, 1988. pp. 30-40
@inproceedings{44298ba602b8451a95c8f03cb587d0c3,
title = "HPSM2: A REFINED SINGLE-CHIP MICROENGINE.",
abstract = "The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33{\%} performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.",
author = "Hwu, {Wen-Mei W} and Patt, {Yale N.}",
year = "1988",
language = "English (US)",
isbn = "0818608412",
pages = "30--40",
editor = "Hoevel, {Lee W.} and {NCR Corp}, Dayton",
booktitle = "Proceedings of the Hawaii International Conference on System Science",
publisher = "IEEE",

}

TY - GEN

T1 - HPSM2

T2 - A REFINED SINGLE-CHIP MICROENGINE.

AU - Hwu, Wen-Mei W

AU - Patt, Yale N.

PY - 1988

Y1 - 1988

N2 - The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33% performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.

AB - The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33% performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.

UR - http://www.scopus.com/inward/record.url?scp=0023828504&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0023828504&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0023828504

SN - 0818608412

SP - 30

EP - 40

BT - Proceedings of the Hawaii International Conference on System Science

A2 - Hoevel, Lee W.

A2 - NCR Corp, Dayton

PB - IEEE

ER -