HPSM2: A REFINED SINGLE-CHIP MICROENGINE.

Wen mei W. Hwu, Yale N. Patt

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33% performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.

Original languageEnglish (US)
Title of host publicationProceedings of the Hawaii International Conference on System Science
PublisherIEEE
Pages30-40
Number of pages11
ISBN (Print)0818608412, 9780818608414
DOIs
StatePublished - 1988

Publication series

NameProceedings of the Hawaii International Conference on System Science
ISSN (Print)0073-1129

ASJC Scopus subject areas

  • Computer Science(all)

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  • Cite this

    Hwu, W. M. W., & Patt, Y. N. (1988). HPSM2: A REFINED SINGLE-CHIP MICROENGINE. In Proceedings of the Hawaii International Conference on System Science (pp. 30-40). (Proceedings of the Hawaii International Conference on System Science). IEEE. https://doi.org/10.1109/hicss.1988.11740