TY - GEN
T1 - HPSM2
T2 - A REFINED SINGLE-CHIP MICROENGINE.
AU - Hwu, Wen mei W.
AU - Patt, Yale N.
PY - 1988
Y1 - 1988
N2 - The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33% performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.
AB - The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33% performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.
UR - http://www.scopus.com/inward/record.url?scp=0023828504&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0023828504&partnerID=8YFLogxK
U2 - 10.1109/hicss.1988.11740
DO - 10.1109/hicss.1988.11740
M3 - Conference contribution
AN - SCOPUS:0023828504
SN - 0818608412
SN - 9780818608414
T3 - Proceedings of the Hawaii International Conference on System Science
SP - 30
EP - 40
BT - Proceedings of the Hawaii International Conference on System Science
PB - IEEE
ER -