@inproceedings{51c6df89d42d4a19bf213197d557fefa,
title = "HPSm, a High Performance Restricted Data Flow Architecture Having Minimal Functionality",
abstract = "Our recent work in microarchitecture has identified a new model of execution, restricted data Bow, in which data flow techniques are used to coordinate out-of-order execution of sequential instruction streams. We believe that the restricted data flow model has great potential for implementing very high performance computing engines. This paper defines a minimal functionality variant of our model, which we are calling HPSm. The instruction set, data path, timing and control of HPSm are all described. A simulator for HPSm has been written, and some of the Berkeley RISC benchmarks have been executed on the simulator. We report the measurements obtained from these benchmarks, along with the measurements obtained for the Berkeley RISC II. The resulb are encouraging.",
author = "Hwu, {Wen Mei} and Patt, {Yale N.}",
note = "Publisher Copyright: {\textcopyright} 1998 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.; 25th International Symposium on Computer Architecture, ISCA 1998 ; Conference date: 27-06-1998 Through 02-07-1998",
year = "1998",
month = aug,
day = "1",
doi = "10.1145/285930.285989",
language = "English (US)",
series = "Proceedings - International Symposium on Computer Architecture",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "300--308",
editor = "Sohi, {Gurindar S.}",
booktitle = "ISCA 1998 - 25 years of the International Symposia on Computer Architecture (Selected Papers)",
address = "United States",
}