Hot carrier induced degradation in deep submicron MOSFETs at 100 °C

E. Li, Elyse Rosenbaum, L. F. Register, J. Tao, P. Fang

Research output: Contribution to journalArticle

Abstract

Lifetime testing of NMOSFETs and PMOSFETs shows that reliability testing must be carried out at the expected circuit operating temperature rather than at room temperature to avoid overestimating the circuit lifetime. Results also show that at 100 °C, the worst case DC bias condition is Vg = Vd.

Original languageEnglish (US)
Pages (from-to)103-107
Number of pages5
JournalAnnual Proceedings - Reliability Physics (Symposium)
StatePublished - 2000

Fingerprint

Hot carriers
Degradation
Networks (circuits)
Testing
Temperature

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

Cite this

Hot carrier induced degradation in deep submicron MOSFETs at 100 °C. / Li, E.; Rosenbaum, Elyse; Register, L. F.; Tao, J.; Fang, P.

In: Annual Proceedings - Reliability Physics (Symposium), 2000, p. 103-107.

Research output: Contribution to journalArticle

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