Highly accurate SPICE-compatible modeling for single- and double-gate GNRFETs with studies on technology scaling

Morteza Gholipour, Ying Yu Chen, Amit Sangai, Deming Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we present a highly accurate closed-form compact model for Schottky-Barrier-type Graphene Nano-Ribbon Field-Effect Transistors (SB-GNRFETs). This is a physics-based analytical model for the current-voltage (I-V) characteristics of SB-GNRFETs. We carry out accurate approximations of Schottky barrier tunneling, channel charge and current, which provide improved accuracy while maintaining compactness. This SPICE-compatible compact model surpasses the existing model [15] in accuracy, and enables efficient circuit-level simulations of futuristic GNRFET-based circuits. The proposed model considers various design parameters and process variation effects, including graphene-specific edge roughness, which allows complete and thorough exploration and evaluation of SB-GNRFET circuits. We are able to model both single- and double-gate SB-GNRFETs, so we can evaluate and compare these two types of SB-GNRFET. We also compare circuit-level performance of SB-GNRFETs with multi-gate (MG) Si-CMOS for a scalability study in future generation technology. Our circuit simulations indicate that SB-GNRFET has an energy-delay product (EDP) advantage over Si-CMOS; the EDP of the ideal SB-GNRFET (assuming no process variation) is ∼1.3% of that of Si-CMOS, while the EDP of the non-ideal case with process variation is 136% of that of Si-CMOS. Finally, we study technology scaling with SB-GNRFET and MG Si-CMOS. We show that the EDP of ideal (non-ideal) SB-GNRFET is ∼0.88% (54%) EDP of that of Si-CMOS as the technology nodes scales down to 7 nm.

Original languageEnglish (US)
Title of host publicationProceedings - Design, Automation and Test in Europe, DATE 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9783981537024
DOIs
StatePublished - Jan 1 2014
Event17th Design, Automation and Test in Europe, DATE 2014 - Dresden, Germany
Duration: Mar 24 2014Mar 28 2014

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

Other17th Design, Automation and Test in Europe, DATE 2014
CountryGermany
CityDresden
Period3/24/143/28/14

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Gholipour, M., Chen, Y. Y., Sangai, A., & Chen, D. (2014). Highly accurate SPICE-compatible modeling for single- and double-gate GNRFETs with studies on technology scaling. In Proceedings - Design, Automation and Test in Europe, DATE 2014 [6800334] (Proceedings -Design, Automation and Test in Europe, DATE). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.7873/DATE2014.133