High throughput, low cost dual-mode patterning method for large area substrates

A high-throughput, low cost, patterning platform is provided that is an alternative to conventional photolithography and direct laser ablation patterning techniques. The processing methods are useful for making patterns of microsized and/or nanosized structures having accurately selected physical dimensions and spatial orientation that comprise active and passive components of a range of microelectronic devices. Processing provided by the methods is compatible with large area substrates, such as device substrates for semiconductor integrated circuits, displays, and microelectronic device arrays and systems, and is useful for fabrication applications requiring patterning of layered materials, such as patterning thin film layers in thin film electronic devices.