High power keeps cool

Michael Lucas; Naresh Shanbhag; Kaushik Roy; Fadi Kurdahi; John Fagan

doi:10.1109/MCD.2004.1317947

High power keeps cool

Michael Lucas, Naresh Shanbhag, Kaushik Roy, Fadi Kurdahi, John Fagan

Research output: Contribution to journal › Article › peer-review

Abstract

Under the Defense Advanced Research Projects Agency (DARPA)-sponsored Mission-Specific Processing (MSP) project, a team of researchers developed and demonstrated low-power, high-performance application-specific integrated circuit (ASIC) cells and computation techniques to provide 10x throughput performance per watt improvements to meet next-generation DoD sensor-processing applications. The resulting designs include a fluid IP core generator, reduced-complexity algorithms, advanced I/O circuits, and reconfigurable cores.

Original language	English (US)
Pages (from-to)	22-30
Number of pages	9
Journal	IEEE Circuits and Devices Magazine
Volume	20
Issue number	4
DOIs	https://doi.org/10.1109/MCD.2004.1317947
State	Published - Jul 2004

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Instrumentation
Electrical and Electronic Engineering

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10.1109/MCD.2004.1317947

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title = "High power keeps cool",

abstract = "Under the Defense Advanced Research Projects Agency (DARPA)-sponsored Mission-Specific Processing (MSP) project, a team of researchers developed and demonstrated low-power, high-performance application-specific integrated circuit (ASIC) cells and computation techniques to provide 10x throughput performance per watt improvements to meet next-generation DoD sensor-processing applications. The resulting designs include a fluid IP core generator, reduced-complexity algorithms, advanced I/O circuits, and reconfigurable cores.",

author = "Michael Lucas and Naresh Shanbhag and Kaushik Roy and Fadi Kurdahi and John Fagan",

note = "Funding Information: This work was supported by Dr. Robert Reuss of DARPA/MTO, under the Mission-Specific Processing Contract NBCHC010038. The authors thank the participating members of the team, most notably Ken Delson, Dave Fry, Rob Kober, Joe Matesic, Steve Shauck, and Jennifer Trotta of Northrop Grumman; Timothy M. Wilson, Jeffrey A. Geib, Eric J. Martina, Ming Zhang, Byonghyo Shim, and Brian Lam of the University of Illinois; Yongtao Wang, Hamid Mahmoodi-Meimand, Hunsoo Choo, Woopyo Jeong, Jong-sun Park, Lihyih Chiou, and Mark Johnson of Purdue University; and S. Safavi, M. H. Lee, A. Niktash of Morpho Technologies.",

year = "2004",

month = jul,

doi = "10.1109/MCD.2004.1317947",

language = "English (US)",

volume = "20",

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AU - Lucas, Michael

AU - Shanbhag, Naresh

AU - Roy, Kaushik

AU - Kurdahi, Fadi

AU - Fagan, John

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PY - 2004/7

Y1 - 2004/7

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AB - Under the Defense Advanced Research Projects Agency (DARPA)-sponsored Mission-Specific Processing (MSP) project, a team of researchers developed and demonstrated low-power, high-performance application-specific integrated circuit (ASIC) cells and computation techniques to provide 10x throughput performance per watt improvements to meet next-generation DoD sensor-processing applications. The resulting designs include a fluid IP core generator, reduced-complexity algorithms, advanced I/O circuits, and reconfigurable cores.

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High power keeps cool

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