High-performance nanoscale topological inductor

Timothy M. Philip, Matthew J. Gilbert

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Despite being an important constituent of a variety of RF and voltage regulating circuits, on-chip inductors have failed to scale at the same rapid pace as other components such as capacitors and transistors. This failure is largely due to the bulky spiral geometry that is needed for planar device fabrication, which results in low inductance densities. Ultimately, an alternative design paradigm using new phenomena and materials is necessary to achieve the miniaturization and performance goals for the future of these vital components. Here, we present a novel inductor design that achieves high performance by utilizing the surface states of 3D time-reversal-invariant (TRI) topological insulators (TIs).

Original languageEnglish (US)
Title of host publication75th Annual Device Research Conference, DRC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509063277
StatePublished - Aug 1 2017
Event75th Annual Device Research Conference, DRC 2017 - South Bend, United States
Duration: Jun 25 2017Jun 28 2017

Publication series

NameDevice Research Conference - Conference Digest, DRC
ISSN (Print)1548-3770


Other75th Annual Device Research Conference, DRC 2017
CountryUnited States
CitySouth Bend

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'High-performance nanoscale topological inductor'. Together they form a unique fingerprint.

  • Cite this

    Philip, T. M., & Gilbert, M. J. (2017). High-performance nanoscale topological inductor. In 75th Annual Device Research Conference, DRC 2017 [7999424] (Device Research Conference - Conference Digest, DRC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DRC.2017.7999424