High-Performance GaN Vertical p-i-n Diodes via Silicon Nitride Shadowed Selective-Area Growth and Optimized FGR-and JTE-Based Edge Termination

Palash Sarker, Frank P. Kelly, Matthew Landi, Riley E. Vesto, Kyekyoon Kim

Research output: Contribution to journalArticlepeer-review

Abstract

In this work, we develop highly efficient ET schemes based on a selective-area processing methodology that can effectively stymie device leakage, resulting in reliable device operation. In particular, we demonstrate plasma-assisted molecular-beam epitaxy (PAMBE) facilitated silicon nitride shadowed selective-area growth (SNS-SAG) technique, capable of producing smooth GaN interfaces and sidewalls as an enabling technology for high-performance vertical GaN power devices. SNS-SAG is shown to reduce leakage current by at least four orders of magnitude compared to a dry etched device. Floating guard ring (FGR) and junction termination extension (JTE) based ET designs for GaN p-i-n diodes for punchthrough operation have been simulated and analyzed in order to develop SNS-SAG compatible space-modulated junction termination extension (SM-JTE) schemes capable of achieving maximum reverse blocking efficiency > 98% while maintaining a wide doping window of up to 5×1017cm-3 at a minimum reverse blocking efficiency of 90% extending well into high 1017cm-3 range ( 8×1017cm-3). In conjunction with the proposed SNS-SAG technique, SM-JTE schemes have the prospects to offer reliable GaN vertical power device operation.

Original languageEnglish (US)
JournalIEEE Journal of the Electron Devices Society
DOIs
StateAccepted/In press - 2020

Keywords

  • Punchthrough (PT)
  • reverse blocking efficiency
  • silicon nitride shadowed selective-area growth (SNS-SAG)
  • space-modulated junction termination extension (SM-JTE).

ASJC Scopus subject areas

  • Biotechnology
  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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