TY - JOUR
T1 - High-Performance GaN Vertical p-i-n Diodes via Silicon Nitride Shadowed Selective-Area Growth and Optimized FGR- And JTE-Based Edge Termination
AU - Sarker, Palash
AU - Kelly, Frank P.
AU - Landi, Matthew
AU - Vesto, Riley E.
AU - Kim, Kyekyoon
N1 - Funding Information:
This work was supported by the Office of Naval Research (ONR) under Award N00014-17-1-2681 (Program Manager: Lynn J. Petersen).
Publisher Copyright:
© 2013 IEEE.
Copyright:
Copyright 2021 Elsevier B.V., All rights reserved.
PY - 2021
Y1 - 2021
N2 - In this work, we develop highly efficient ET schemes based on a selective-area processing methodology that can effectively stymie device leakage, resulting in reliable device operation. In particular, we demonstrate plasma-assisted molecular-beam epitaxy (PAMBE) facilitated silicon nitride shadowed selective-area growth (SNS-SAG) technique, capable of producing smooth GaN interfaces and sidewalls as an enabling technology for high-performance vertical GaN power devices. SNS-SAG is shown to reduce leakage current by at least four orders of magnitude compared to a dry etched device. Floating guard ring (FGR) and junction termination extension (JTE) based ET designs for GaN p-i-n diodes for punchthrough operation have been simulated and analyzed in order to develop SNS-SAG compatible space-modulated junction termination extension (SM-JTE) schemes capable of achieving maximum reverse blocking efficiency >98% while maintaining a wide doping window of up to sim ,,5times 10 {17} cm-3 at a minimum reverse blocking efficiency of 90% extending well into high 1017cm-3 range ( sim ,,8times 10 {17} cm-3). In conjunction with the proposed SNS-SAG technique, SM-JTE schemes have the prospects to offer reliable GaN vertical power device operation.
AB - In this work, we develop highly efficient ET schemes based on a selective-area processing methodology that can effectively stymie device leakage, resulting in reliable device operation. In particular, we demonstrate plasma-assisted molecular-beam epitaxy (PAMBE) facilitated silicon nitride shadowed selective-area growth (SNS-SAG) technique, capable of producing smooth GaN interfaces and sidewalls as an enabling technology for high-performance vertical GaN power devices. SNS-SAG is shown to reduce leakage current by at least four orders of magnitude compared to a dry etched device. Floating guard ring (FGR) and junction termination extension (JTE) based ET designs for GaN p-i-n diodes for punchthrough operation have been simulated and analyzed in order to develop SNS-SAG compatible space-modulated junction termination extension (SM-JTE) schemes capable of achieving maximum reverse blocking efficiency >98% while maintaining a wide doping window of up to sim ,,5times 10 {17} cm-3 at a minimum reverse blocking efficiency of 90% extending well into high 1017cm-3 range ( sim ,,8times 10 {17} cm-3). In conjunction with the proposed SNS-SAG technique, SM-JTE schemes have the prospects to offer reliable GaN vertical power device operation.
KW - Punchthrough (PT)
KW - reverse blocking efficiency
KW - silicon nitride shadowed selective-area growth (SNS-SAG)
KW - space-modulated junction termination extension (SM-JTE)
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U2 - 10.1109/JEDS.2020.3039979
DO - 10.1109/JEDS.2020.3039979
M3 - Article
AN - SCOPUS:85097179937
SN - 2168-6734
VL - 9
SP - 68
EP - 78
JO - IEEE Journal of the Electron Devices Society
JF - IEEE Journal of the Electron Devices Society
M1 - 9269357
ER -