Hierarchical overlapped tiling

Xing Zhou, Jean Pierre Giacalone, María Jesús Garzarán, Robert H. Kuhn, Yang Ni, David Padua

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper introduces hierarchical overlapped tiling, a transformation that applies loop tiling and fusion to conventional loops. Overlapped tiling is a useful transformation to reduce communication overhead, but it may also generate a significant amount of redundant computation. Hierarchical overlapped tiling performs overlapped tiling hierarchically to balance communication overhead and redundant computation, and thus has the potential to provide better performance. In this paper, we describe the hierarchical overlapped tiling optimization and its implementation in an OpenCL compiler. We also evaluate the effectiveness of this optimization using 8 programs that implement different forms of stencil computation. Our results show that hierarchical overlapped tiling achieves an average 37% speedup over traditional tiling on a 32-core workstation.

Original languageEnglish (US)
Title of host publicationProceedings - International Symposium on Code Generation and Optimization, CGO 2012
Pages207-218
Number of pages12
DOIs
StatePublished - 2012
Event10th International Symposium on Code Generation and Optimization, CGO 2012 - San Jose, CA, United States
Duration: Mar 31 2012Apr 4 2012

Publication series

NameProceedings - International Symposium on Code Generation and Optimization, CGO 2012

Other

Other10th International Symposium on Code Generation and Optimization, CGO 2012
Country/TerritoryUnited States
CitySan Jose, CA
Period3/31/124/4/12

Keywords

  • Compiler optimization
  • Loop tiling and fusion
  • Stencil computation

ASJC Scopus subject areas

  • Software

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