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HIDA: A Hierarchical Dataflow Compiler for High-Level Synthesis
Hanchen Ye
, Hyegang Jun
,
Deming Chen
Electrical and Computer Engineering
Coordinated Science Lab
Information Trust Institute
Siebel School of Computing and Data Science
Research output
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Chapter in Book/Report/Conference proceeding
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Keyphrases
High-level Synthesis
100%
Compiler
100%
High-throughput
40%
Dataflow Architecture
40%
Neural Network
20%
Design Methodology
20%
Design Space
20%
Optimization Problem
20%
Development Cycle
20%
High-level Synthesis Tools
20%
Multiple Levels
20%
Optimization Tool
20%
Synthesis Design
20%
Fully Automated
20%
Synthesis Framework
20%
Memory Wall
20%
Synthesis Optimization
20%
Evaluation Platform
20%
Data Flow Optimization
20%
Neural Network Accelerator
20%
PyTorch
20%
Von Neumann Architecture
20%
Dataflow Design
20%
Computer Science
High Level Synthesis
100%
Neural Network
33%
High Throughput
33%
Field Programmable Gate Arrays
33%
Optimization Problem
16%
Synthesis Tool
16%
Development Cycle
16%
Algorithmic Description
16%
Von Neumann Architecture
16%
Computer Hardware
16%